1. Field of the Invention
The present invention relates to a sequence control apparatus, and more particularly to such an apparatus designed exclusively for sequence control in which the contents of control are determined by a program.
The variety of demands for sequence control apparatuses have increased with the development of automation. If one relies on electromagnetic relays or logic elements in order to fulfill such demands, the alteration of the contents of a control sequence makes it necessary to rewrite a complicated diagram for wiring on a relay or logic element board and to fabricate the corresponding new board. This results in lowered productivity in factories. Further, the fact that the alteration of the contents of control sequence is associated directly with a change in the contents of the hardware, causes various problems from the aspect of production control.
The contents of sequence control realizing a systematic running of a plant cannot be determined until the specifications of all instruments employed in the plant have been determined and the mutual relation between the instruments has been established. According to the conventional approach, therefore, the specification of the sequence control apparatus is determined in a final stage, followed by the design of the apparatus and the fabrication of the hardware required therefor. Thus, the sequence control apparatus is to bear the brunt of a severe restriction even in the fabrication process.
In view of the above problems, an approach has been proposed by which the hardware of a sequence control apparatus is standardized to allow the fabrication of identical hardwares on a production line of a factory while various requirements from users are settled by software. There has been widely used a programmable sequence control apparatus based on a stored program scheme in which a main part of the hardware is left unchanged for different sequence controls while the alteration of the contents of control operation is effected by modifying a program.
The present invention relates, in particular, to such a programmable sequence control apparatus using the stored program scheme.
2. Description of the Prior Art
A conventional sequence control apparatus of this sort includes as main parts thereof an input unit, an output unit, an operation control unit and a memory unit. The input unit is connected to an instrument (for example, a limit switch) for detecting the condition of a process to be controlled by the sequence controlling apparatus. The output unit is connected to a process controlling instrument (for example, an electromagnetic switch or a solenoid valve) which is controlled by the sequence control apparatus. For example, when a limit switch is activated in response to a change in a certain process, the change indicating signal is applied to the operation control unit of the sequence control apparatus through the input unit, and then collated with a predetermined control program stored in the memory unit to determine a required control action. As a result, a control signal is sent to the output unit so that a solenoid valve is closed. The contents of the sequence control operation to be performed are previously stored in the memory unit in the form of a program. When it is desired to store the program in the memory unit or to modify the contents of the program, an exclusive unit called a "program input unit" is connected to the memory unit and it is operated in accordance with a sequence chart.
The above-described kind of sequence control apparatus is designed exclusively for use in sequence control and therefore has functions which are intensively prepared to provide the best utilization for sequence control. Most of the instructions forming a program are suited to sequence control. For example, there are employed a STORE instruction, an AND instruction, an OR instruction, an AND/STORE instruction, an OR/STORE instruction, an OUTPUT instruction, and the like. The operation control unit is provided with an accumulator. A change indicating signal resulting from a change in a certain process, for example, the activation of a limit switch, is once entered in the accumulator through the input unit for collation with a predetermined control program stored in the memory unit. The contents of necessary control determined by the control program is once stored into the accumulator and then sent to the output unit as a control signal. The STORE instruction requires taking a change indicating signal from a predetermined process condition detecting instrument into the accumulator while transferring as an intermediate result, the result of the previous operation which has been stored in the accumulator before the taking of the change indicating signal thereinto, to a shift register prepared as a temporary memory unit. The AND instruction requires producing a logical product of the result of the previous operation stored in the accumulator and the change indicating signal newly taken from the predetermined process condition detecting instrument into the accumulator and returning the result of this logical operation to the accumulator to be stored therein. The OR instruction requires producing a logical sum of the result of the previous operation stored in the accumulator and the change indicating signal newly taken from the predetermined process condition detecting instrument into the accumulator and returning the result of this logical operation to the accumulator to be stored therein. Each of the AND instruction and the OR instruction does not act on the shift register serving as the temporary memory unit. The AND/STORE instruction requires producing a logical product of the result of the previous operation stored in the accumulator and the result of operation taken out of the shift register or temporary memory unit through a shifting of the latter and returning the result of this logical operation to the accumulator to be stored therein. The OR/STORE instruction requires producing a logical sum of the result of the previous operation stored in the accumulator and the result of operation taken out of the shift register or temporary memory unit through a shifting of the latter and returning the result of this logical operation to the accumulator to be stored therein. The OUTPUT instruction requires delivering the result of the previous operation stored in the accumulator.
The contents of sequence control determined by the control program is stored, as a sequence program including a proper combination of the above-mentioned instructions, into a memory unit by means of the program input unit.
The recent advance of microprocessors is remarkable and a sequence control apparatus using a microprocessor in its operation control unit has been widely used. However, a serious problem arises when a microprocessor is incorporated in a sequence control apparatus. That is, the microprocessor uses one word as the unit for its processing of operation, one word being formed of a plurality of bits. On the other hand, the sequence control apparatus performing its processing of logical operations for a change indicating signal of logic "1" or "0" from a process condition detecting instrument, for example, a signal resulting from the ON or OFF action of a limit switch, uses one bit as the unit for the processing. An accumulator is incorporated in the microprocessor which performs the processing of operations in terms of the word unit formed of plural (usually, 4, 8, 16, etc.) bits, as is mentioned above. Therefore, the accumulator necessarily takes a bit arrangement which is the same in number as the plural bits forming one word.
When such a microprocessor performing its processing of logical operations in terms of the word unit formed of plural bits is applied to the sequence control apparatus, a change indicating signal of one bit from the process condition detecting instrument is passed through the input unit and then applied to an accumulator on a predetermined one-bit line of a plural-bit arranged data bus. Now, let us consider as an example the case where the STORE instruction is to be executed, namely, the change indicating signal from the instrument is stored into the accumulator through the predetermined one-bit line of the data bus. The microprocessor includes therein a one-bit carry storage area for temporarily storing a carry signal of the accumulator. According to one approach for processing the STORE instruction, the accumulator is first subjected to its shifting operation until the one-bit result of the previous operation stored in the accumulator is transferred to the carry storage area. In the case where a microprocessor is employed, the previously-mentioned shift register is formed by utilizing the shifting operation of the accumulator and a storage area at any predetermined address of a random access memory (hereinafter referred to as a RAM) provided for temporarily storing various data. When the result of the previous operation has been transferred to the carry storage area through the shifting operation of the accumulator, the contents stored at the predetermined address of the RAM provided as the storage area for the shift register are entered into the accumulator. Next, the result of the previous operation, which has been transferred to the carry storage area, is shifted to the accumulator to be stored therein while the contents of the accumulator are shifted. Then, the shifted contents of the accumulator are saved to the predetermined address of the RAM. Subsequently, the change indicating signal is taken into the accumulator. The STORE instruction can be realized through these steps.
Another possible approach utilizing the function of the accumulator for processing the STORE instruction is to allot the one-bit data of each of the change indicating signal and the result of the previous operation of the accumulator to one address of the RAM. A pointer register for indicating an address at which desired data is stored is allotted to a predetermined address of the RAM. The contents of the pointer register are changed as needed to execute the STORE instruction. In more detail, the pointer register is first advanced by one. Next, the result of the previous operation stored in the accumulator is transferred to the address of the RAM indicated by the pointer register. Then, the change indicating signal passed through the input unit is stored into the accumulator.
Both of the above-mentioned approaches have such drawbacks as mentioned below. The former approach utilizing the one-bit carry storage area requires a large number of processing steps including the step for shifting data to the carry storage area, the step for storage of the contents at the predetermined RAM address into the accumulator, the step for shifting the contents of the accumulator and the contents of the carry storage area to the accumulator, the step for storage of the contents of the accumulator into the predetermined RAM address and the step for storage of the change indicating signal into the accumulator. Accordingly, it requires lot of time for execution of one instruction. Since a sequence program usually includes several hundreds of words to several kilowords, a high-speed sequence control cannot be expected using the prior art approach.
The latter approach of allotting the one-bit data representing the change indicating signal and the result of the previous operation of the accumulator to one RAM address has a reduced number of processing steps including the step for advance of the pointer register by one, the step for storage of the contents of the accumulator into the address indicated by the pointer register and the step for storage of the change indicating signal into the accumulator. But, this approach uses only one bit for one word included in the RAM, which results in a poor efficiency of utilization of the RAM.
Further, each of the above approaches uses only one bit of the plural-bit arranged accumulator, which results in a poor efficiency of utilization of the accumulator.